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Dynamic mixed serial-parallel content addressable memory (DMSP CAM).

M. Kang, J. Kim, Y. Yang, and S. Jung. I. J. Circuit Theory and Applications, 41 (7): 721-731 (2013)

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Yang Yang

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Dynamic mixed serial-parallel content addressable memory (DMSP CAM).M. Kang, J. Kim, Y. Yang, and S. Jung. I. J. Circuit Theory and Applications, 41 (7): 721-731 (2013)Power-Gated 9T SRAM Cell for Low-Energy Operation.T. Oh, H. Jeong, K. Kang, J. Park, Y. Yang, and S. Jung. IEEE Trans. Very Large Scale Integr. Syst., 25 (3): 1183-1187 (2017)Incremental Bitline Voltage Sensing Scheme With Half-Adaptive Threshold Reference Scheme in MLC PRAM.J. Ko, Y. Yang, J. Kim, Y. Oh, H. Park, and S. Jung. IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (6): 1444-1455 (2017)One-Sided Static Noise Margin and Gaussian-Tail-Fitting Method for SRAM.H. Jeong, Y. Yang, J. Lee, J. Kim, and S. Jung. IEEE Trans. Very Large Scale Integr. Syst., 22 (6): 1262-1269 (2014)Offset-Compensated Cross-Coupled PFET Bit-Line Conditioning and Selective Negative Bit-Line Write Assist for High-Density Low-Power SRAM.H. Jeong, T. Kim, Y. Yang, T. Song, G. Kim, H. Won, and S. Jung. IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (4): 1062-1070 (2015)A 1Tb 3b/Cell 8th-Generation 3D-NAND Flash Memory with 164MB/s Write Throughput and a 2.4Gb/s Interface.M. Kim, S. Yun, J. Park, H. Park, J. Lee, Y. Kim, D. Na, S. Choi, Y. Song, J. Lee and 24 other author(s). ISSCC, page 136-137. IEEE, (2022)Single-Ended 9T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Read Performance in 22-nm FinFET Technology.Y. Yang, J. Park, S. Song, J. Wang, G. Yeap, and S. Jung. IEEE Trans. Very Large Scale Integr. Syst., 23 (11): 2748-2752 (2015)Architecture-Aware Analytical Yield Model for Read Access in Static Random Access Memory.H. Kang, J. Kim, H. Jeong, Y. Yang, and S. Jung. IEEE Trans. Very Large Scale Integr. Syst., 23 (4): 752-765 (2015)SRAM Operational Mismatch Corner Model for Efficient Circuit Design and Yield Analysis.T. Choi, H. Jeong, Y. Yang, J. Park, and S. Jung. IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (8): 2063-2072 (2017)SRAM Design for 22-nm ETSOI Technology: Selective Cell Current Boosting and Asymmetric Back-Gate Write-Assist Circuit.Y. Yang, J. Park, S. Song, J. Wang, G. Yeap, and S. Jung. IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (6): 1538-1545 (2015)

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Disambiguation of "Yang, Younghwi"

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Dynamic mixed serial-parallel content addressable memory (DMSP CAM).

Please choose a person to relate this publication to

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Yang, Younghwi"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Dynamic mixed serial-parallel content addressable memory (DMSP CAM).

Please choose a person to relate this publication to

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Yang Yang

Other publications of authors with the same name

Disambiguation

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Dynamic mixed serial-parallel content addressable memory (DMSP CAM).