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A feasibility study of quaternary FPGA designs by implementing Neuron-MOS mechanism.

, and . ISCAS, page 942-945. IEEE, (2015)

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Characterizations and effective computation of supremal relatively observable sublanguages., , and . Discrete Event Dynamic Systems, 28 (2): 269-287 (2018)Real-Time On-Line-Learning Support Vector Machine Based on a Fully-Parallel Analog VLSI Processor., and . ICAISC (2), volume 7268 of Lecture Notes in Computer Science, page 223-230. Springer, (2012)STT-BSNN: An In-Memory Deep Binary Spiking Neural Network Based on STT-MRAM., , , and . IEEE Access, (2021)Supervision localization of timed discrete-event systems., , , , and . Autom., 49 (9): 2786-2794 (2013)A feasibility study of quaternary FPGA designs by implementing Neuron-MOS mechanism., and . ISCAS, page 942-945. IEEE, (2015)GPGPU Implementation of Variational Bayesian Gaussian Mixture Models., , and . IEICE Trans. Inf. Syst., 105-D (3): 611-622 (2022)Delay-robustness in distributed control of timed discrete-event systems based on supervisor localization., , and . CDC, page 6719-6724. IEEE, (2014)On relative observability of discrete-event systems., , and . CDC, page 7285-7290. IEEE, (2013)Supervision localization of timed discrete-event systems., , and . ACC, page 5666-5671. IEEE, (2013)Bisection Neural Network Toward Reconfigurable Hardware Implementation., , , , and . IEEE Trans. Neural Networks Learn. Syst., 35 (3): 3663-3673 (March 2024)