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Efficient detection and exploitation of infeasible paths for software timing analysis.

, , , and . DAC, page 358-363. ACM, (2006)

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A Framework to Model Branch Prediction for Worst Case Execution Time Analysis, and . (June 2002)Long version of: A Framework to Model Branch Prediction for WCET Analysis, Tulika Mitra, Abhik Roychoudhury, 2nd Workshop on Worst Case Execution Time Analysis (WCET), Austria, June 2002. Also available as NUS Technical Report 11-01. One of Author's homepage: http://www.comp.nus.edu.sg/~abhik/.Generalized Unfold/fold Transformation Systems for Normal Logic Programs., , and . ICLP, page 616. MIT Press, (1999)Accurate estimation of cache-related preemption delay., , and . CODES+ISSS, page 201-206. ACM, (2003)Scratchpad allocation for concurrent embedded software., , and . CODES+ISSS, page 37-42. ACM, (2008)Interacting process classes., , , and . ICSE, page 302-311. ACM, (2006)Scalable and precise refinement of cache timing analysis via path-sensitive verification., and . Real Time Syst., 49 (4): 517-562 (2013)Fairness-guided SMT-based Rectification of Decision Trees and Random Forests., , , and . CoRR, (2020)Formal Reasoning about Hardware and Software Memory Models.. ICFEM, volume 2495 of Lecture Notes in Computer Science, page 423-434. Springer, (2002)Automated program repair., , and . Commun. ACM, 62 (12): 56-65 (2019)Performance debugging of Esterel specifications., , , and . Real Time Syst., 48 (5): 570-600 (2012)