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Parametric Encryption Hardware Design.

, , , and . ARC, volume 5992 of Lecture Notes in Computer Science, page 68-79. Springer, (2010)

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Constant power reconfigurable computing., , and . FPT, page 1-8. IEEE, (2011)Parametrized hardware architectures for the Lucas primality test., , and . ICSAMOS, page 124-131. IEEE, (2011)Detecting power attacks on reconfigurable hardware., and . FPL, page 14-19. IEEE, (2012)Reconfigurable architectures for cryptographic systems.. Imperial College London, UK, (2013)British Library, EThOS.Mapping Loop Structures Onto Parametrized Hardware Pipelines., and . IEEE Trans. Very Large Scale Integr. Syst., 22 (3): 631-640 (2014)Design space exploration of parametric pipelined designs., and . ASAP, page 47-54. IEEE Computer Society, (2010)Parametric Encryption Hardware Design., , , and . ARC, volume 5992 of Lecture Notes in Computer Science, page 68-79. Springer, (2010)