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PDNOC: An Efficient Partially Diagonal Network-on-Chip Design.

T. Xu, V. Leppänen, P. Liljeberg, J. Plosila, and H. Tenhunen. PPAM (1), volume 8384 of Lecture Notes in Computer Science, page 513-522. Springer, (2013)

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Martin Juha

Juha Tiihonen

Attila Juhász

Ingolf Juhasz-Böss

Juha Reunanen

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Towards a Formal Power Estimation Framework for Hardware Systems.J. Tuominen, T. Säntti, and J. Plosila. SoC, page 96-99. IEEE, (2005)DyMeP: An Infrastructure to Support Dynamic Memory Binding for Runtime Mapping in CGRAs.M. Tajammul, S. Jafri, P. Ellervee, A. Hemani, H. Tenhunen, and J. Plosila. VLSID, page 547-552. IEEE Computer Society, (2015)SEECC: A secure and efficient elliptic curve cryptosystem for E-health applications.G. Sahebi, A. Majd, M. Ebrahimi, J. Plosila, J. Karimpour, and H. Tenhunen. HPCS, page 492-500. IEEE, (2016)CARS: congestion-aware request scheduler for network interfaces in NoC-based manycore systems.M. Daneshtalab, M. Ebrahimi, J. Plosila, and H. Tenhunen. DATE, page 1048-1051. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Online testing of many-core systems in the Dark Silicon era.M. Haghbayan, A. Rahmani, P. Liljeberg, J. Plosila, and H. Tenhunen. DDECS, page 141-146. IEEE Computer Society, (2014)Energy-Efficient Navigation of an Autonomous Swarm with Adaptive Consciousness.J. Yasin, H. Mahboob, M. Haghbayan, M. Yasin, and J. Plosila. Remote. Sens., 13 (6): 1059 (2021)Semi-Serial On-Chip Link Implementation for Energy Efficiency and High Throughput.E. Nigussie, S. Tuuna, J. Plosila, J. Isoaho, and H. Tenhunen. IEEE Trans. Very Large Scale Integr. Syst., 20 (12): 2265-2277 (2012)Parallel imperialist competitive algorithms.A. Majd, G. Sahebi, M. Daneshtalab, J. Plosila, S. Lotfi, and H. Tenhunen. Concurr. Comput. Pract. Exp., (2018)Using Ant Colony System to Consolidate VMs for Green Cloud Computing.F. Farahnakian, A. Ashraf, T. Pahikkala, P. Liljeberg, J. Plosila, I. Porres, and H. Tenhunen. IEEE Trans. Serv. Comput., 8 (2): 187-198 (2015)High-performance on-chip network platform for memory-on-processor architectures.M. Daneshtalab, M. Ebrahimi, P. Liljeberg, J. Plosila, and H. Tenhunen. ReCoSoC, page 1-6. IEEE, (2011)

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Disambiguation of "Plosila, Juha"

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PDNOC: An Efficient Partially Diagonal Network-on-Chip Design.

Please choose a person to relate this publication to

Martin Juha

Juha Tiihonen

Attila Juhász

Ingolf Juhasz-Böss

Juha Reunanen

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Plosila, Juha"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML PDNOC: An Efficient Partially Diagonal Network-on-Chip Design.

Please choose a person to relate this publication to

Martin Juha

Juha Tiihonen

Attila Juhász

Ingolf Juhasz-Böss

Juha Reunanen

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
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APA
Chicago
DIN 1505
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PDNOC: An Efficient Partially Diagonal Network-on-Chip Design.