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Social dynamics of free and open source team communications.

, , and . OSS, volume 203 of IFIP, page 319-330. Springer, (2006)

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Performance-driven register write inhibition in high-level synthesis under strict maximum-permissible clock latency range., and . ASP-DAC, page 239-244. IEEE, (2012)Social dynamics of free and open source team communications., , and . OSS, volume 203 of IFIP, page 319-330. Springer, (2006)Automated Conversion of 2D Triangular Mesh into Quadrilateral Mesh with Directionality Control., , , , and . IMR, page 77-86. (1998)Register binding and domain assignment for multi-domain clock skew scheduling-aware high-level synthesis., and . ISQED, page 778-783. IEEE, (2012)Optimal register assignment with minimum-delay compensation for latch-based design., and . APCCAS, page 887-890. IEEE, (2010)Reliable and low-power clock distribution using pre- and post-silicon delay adaptation in high-level synthesis., and . ISCAS, page 1664-1667. IEEE, (2012)ISIS: Multiprocessor Simulator Library., , and . Applied Informatics, page 198-200. IASTED/ACTA Press, (1999)Clustering Large Number of Faces for 2-Dimensional Mesh Generation., , , , and . IMR, page 281-292. (1999)ATTEMPT-1: A Reconfigurable Multiprocessor Testbed., , , , , and . FPL, volume 1142 of Lecture Notes in Computer Science, page 200-209. Springer, (1996)Optimal register-type selection during resource binding in flip-flop/latch-based high-level synthesis., and . ACM Great Lakes Symposium on VLSI, page 79-82. ACM, (2012)