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Logic simulation with current-limited switches.

, , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 9 (2): 133-141 (1990)

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Logic simulation with current-limited switches., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 9 (2): 133-141 (1990)Analog functional simulator for multilevel systems., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 10 (5): 565-576 (1991)Current-limited switch-level timing simulator for MOS logic networks., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 7 (6): 659-667 (1988)