Author of the publication

Data assignment and access scheduling exploration for multi-layer memory architectures.

, , and . ESTImedia, page 61-66. IEEE Computer Society, (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Global approach to assignment and scheduling of complex behaviors based on HCDG and constraint programming., and . J. Syst. Archit., 49 (12-15): 489-503 (2003)Post-synthesis back-annotation of timing information in behavioral VHDL., , , and . J. Syst. Archit., 42 (9-10): 725-741 (1997)Compiling VHDL into a high-level synthesis design representation., , , and . EURO-DAC, page 604-609. IEEE Computer Society Press, (1992)Digital Systems Design Using Constraint Logic Programming., , and . PACPL, page 149-166. Practical Application Company Ltd., (2000)Evaluation of SIMD Architecture Enhancement in Embedded Processors for MPEG-4., and . DSD, page 262-269. IEEE Computer Society, (2004)Automatic Parallelization of a Petri Net-Based Design Representation for High-Level Synthesis., , , and . EUROMICRO, page 185-192. IEEE Computer Society, (1996)Integrated Resource Assignment and Scheduling of Task Graphs Using Finite Domain Constraints.. DATE, page 772-773. IEEE Computer Society / ACM, (1999)Testability analysis and improvement from VHDL behavioral specifications., , and . EURO-DAC, page 644-649. IEEE Computer Society, (1994)A New Necessary Condition for Shortest Path Routing., and . NET-COOP, volume 4465 of Lecture Notes in Computer Science, page 195-204. Springer, (2007)Constraints-driven design space exploration for distributed embedded systems.. J. Syst. Archit., 47 (3-4): 241-261 (2001)