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A novel VLSI architecture of motion compensation for multiple standards.

, , , and . IEEE Trans. Consumer Electronics, 54 (2): 687-694 (2008)

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An efficient VLSI architecture of VLD for AVS HDTV decoder., , , and . IEEE Trans. Consumer Electronics, 52 (2): 696-701 (2006)A Novel Pipeline Design for H.264 CABAC Decoding., , , and . PCM, volume 4810 of Lecture Notes in Computer Science, page 559-568. Springer, (2007)An Optimized Hardware Video Encoder for AVS with Level C+ Data Reuse Scheme for Motion Estimation., , , , , and . ICME, page 1055-1060. IEEE Computer Society, (2012)A highly efficient external memory interface architecture for AVS HD video encoder., , , , , , and . ICME Workshops, page 1-6. IEEE Computer Society, (2013)A flexible VLSI architecture of transport processor for an AVS HDTV decoder SoC., , , , and . IEEE Trans. Consumer Electronics, 52 (4): 1427-1432 (2006)Three-level pipelined multi-resolution integer motion estimation engine with optimized reference data sharing search for AVS., , , , , and . J. Real Time Image Process., 15 (1): 43-55 (2018)Structure preserving single image super-resolution., , , , , and . ICIP, page 1409-1413. IEEE, (2016)A Motion Vector Predictor Architecture for AVS and MPEG-2 HDTV Decoder., , , , and . PCM, volume 4261 of Lecture Notes in Computer Science, page 424-431. Springer, (2006)A Background Modeling Scheme Based on High Efficiency Motion Classification for Surveillance Video Coding., , , , , , and . PCM, volume 8879 of Lecture Notes in Computer Science, page 44-53. Springer, (2014)Part-aware Progressive Unsupervised Domain Adaptation for Person Re-Identification., , , , , , , , and . IEEE Trans. Multim., (2021)