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Disambiguation of "Sahoo, Durga Prasad"

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The Interpose PUF: Secure PUF Design against State-of-the-art Machine Learning Attacks.

, , , , , and . IACR Trans. Cryptogr. Hardw. Embed. Syst., 2019 (4): 243-290 (2019)

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Nirakar Sahoo

Harekrushna Sahoo

Sarbeswar Sahoo

Balaram Sahoo

Rama Krishna Sahoo

 

Other publications of authors with the same name

Design of low area-overhead ring oscillator PUF with large challenge space., , and . ReConFig, page 1-6. IEEE, (2013)The Interpose PUF: Secure PUF Design against State-of-the-art Machine Learning Attacks., , , , , and . IACR Cryptology ePrint Archive, (2018)Trustworthy proofs for sensor data using FPGA based physically unclonable functions., , , and . DATE, page 1504-1507. IEEE, (2018)Lightweight and Secure PUFs: A Survey (Invited Paper)., and . SPACE, volume 8804 of Lecture Notes in Computer Science, page 1-13. Springer, (2014)Architectural Bias: a Novel Statistical Metric to Evaluate Arbiter PUF Variants., , , and . IACR Cryptology ePrint Archive, (2016)An Efficient and Scalable Modeling Attack on Lightweight Secure Physically Unclonable Function., and . IACR Cryptology ePrint Archive, (2016)A 0.16pJ/bit recurrent neural network based PUF for enhanced machine learning attack resistance., , , , and . ASP-DAC, page 627-632. ACM, (2019)Fault Tolerant Implementations of Delay-Based Physically Unclonable Functions on FPGA., , , and . FDTC, page 87-101. IEEE Computer Society, (2016)Side Channel Evaluation of PUF-Based Pseudorandom Permutation., , , , and . DSD, page 237-243. IEEE Computer Society, (2017)Automated Design of High Performance Integer Arithmetic Cores on FPGA., , and . DSD, page 322-329. IEEE Computer Society, (2015)