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Hierarchical Fault Compatibility Identification for Test Generation with a Small Number of Specified Bits.

, and . DFT, page 439-447. IEEE Computer Society, (2007)

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Towards embedded runtime system level optimization for MPSoCs: on-chip task allocation., , , and . ACM Great Lakes Symposium on VLSI, page 121-124. ACM, (2009)Exploiting Shared-Memory to Steer Scalability of Fault Simulation Using Multicore Systems., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 38 (8): 1466-1479 (2019)A Non-Enumerative Technique for Measuring Path Correlation in Digital Circuits., , and . J. Electron. Test., 28 (6): 843-856 (2012)On the Use of ZBDDs for Implicit and Compact Critical Path Delay Fault Test Generation., , and . J. Electron. Test., 24 (1-3): 203-222 (2008)Tackling the complexity of exact path delay fault grading for path intensive circuits., and . ETS, page 1-2. IEEE, (2015)Multiple detection test generation with diversified fault partitioning paths., and . Microprocess. Microsystems, 38 (6): 585-597 (2014)Guest Editorial: Special Section on Defect and Fault Tolerance in VLSI and Nanotechnology., , and . IEEE Trans. Emerg. Top. Comput., 6 (4): 447-449 (2018)Hardware-Enabled Dynamic Resource Allocation for Manycore Systems Using Bidding-Based System Feedback., , , and . EURASIP J. Embed. Syst., (2010)A reconfigurable MPSoC-based QAM modulation architecture., , , , and . VLSI-SoC, page 137-142. IEEE, (2010)Protection and Communication Model of Intelligent Electronic Devices to Investigate Security Threats., , , , and . ISGT, page 1-5. IEEE, (2023)