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High-Level Power Minimization of Analog Sensor Interface Architectures.

, , and . Integr. Comput. Aided Eng., 5 (4): 303-314 (1998)

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Modeling of the Power-supply Interactions of CMOS Operational Amplifiers Using Symbolic Computation., and . ISCAS, page 1381-1384. IEEE, (1993)Efficient simulation model for DAC dynamic properties., and . ISCAS, page 2896-2899. IEEE, (2010)A novel operating-point driven method for the sizing of analog IC., , , and . ISCAS, page 781-784. IEEE, (2011)A reconfigurable, 0.13µm CMOS 110pJ/pulse, fully integrated IR-UWB receiver for communication and sub-cm ranging., , , and . ISSCC, page 250-251. IEEE, (2009)Regression criteria and their application in different modeling cases., , , , and . ISCAS (5), page 85-8. IEEE, (2002)Behavioral modeling of (coupled) harmonic oscillators., , and . DAC, page 536-541. ACM, (2002)Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients., , , , , , and . DAC, page 399-404. ACM, (2002)An efficient optimization--based technique to generate posynomial performance models for analog integrated circuits., , and . DAC, page 431-436. ACM, (2002)Canonical form functions as a simple means for genetic programming to evolve human-interpretable functions., and . GECCO, page 855-862. ACM, (2006)Sparse ε-tube support vector regression by active learning., , and . Soft Comput., 18 (6): 1113-1126 (2014)