Author of the publication

Efficient Mapping and Allocation of Execution Units to Task Graphs using an Evolutionary Framework.

, , and . SIGARCH Comput. Archit. News, 43 (4): 46-51 (2015)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

An Impulse-C Hardware Accelerator for Packet Classification Based on Fine/Coarse Grain Optimization., , , and . Int. J. Reconfigurable Comput., (2013)Hardware Accelerators Targeting a Novel Group Based Packet Classification Algorithm., , and . Int. J. Reconfigurable Comput., (2013)Corrigendum to Än Impulse-C Hardware Accelerator for Packet Classification Based on Fine/Coarse Grain Optimization"., , , and . Int. J. Reconfigurable Comput., (2018)Depictions of genotypic space for evaluating the suitability of different recombination operators., , , and . GECCO, page 609-616. ACM, (2012)Shake And Bake: A Method of Mapping Code to Irregular DSPs., and . VLSI Design, page 506-508. IEEE Computer Society, (1997)An investigation of parallel memetic algorithms for VLSI circuit partitioning on multi-core computers., , , and . CCECE, page 1-6. IEEE, (2010)An Enhanced Genetic Algorithm for Solving the High-Level Synthesis Problems of Scheduling, Allocation, and Binding., and . International Journal of Computational Intelligence and Applications, 1 (1): 91-110 (2001)An Approximate Solution for Steiner Trees in Multicast Routing., , and . IC-AI, page 707-711. CSREA Press, (2004)An ILP-based approach to code generation., , , and . Code Generation for Embedded Processors, page 103-118. Kluwer, (1994)A scalable, serially-equivalent, high-quality parallel placement methodology suitable for modern multicore and GPU architectures., , and . FPL, page 1-8. IEEE, (2014)