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Disambiguation of "Lee, Zhao Chuan"

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0.77 fJ/bit/search Content Addressable Memory Using Small Match Line Swing and Automated Background Checking Scheme for Variation Tolerance.

, , , , , and . IEEE J. Solid State Circuits, 49 (7): 1487-1498 (2014)

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Song-Chuan Zhao

Li-Chuan Lee

Zhao Zhao

Shih-yu Chuang

Jen-Yang Chuang

 

Other publications of authors with the same name

A novel analog-to-residue converter for biomedical DSP application., , , , and . ISOCC, page 371-374. IEEE, (2012)An 8T SRAM with BTI-Aware Stability Monitor and two-phase write operation for cell stability improvement in 28-nm FDSOI., , , and . ESSCIRC, page 437-440. IEEE, (2016)An Automated System for Checking Lithography Friendliness of Standard Cells., , , , , and . APCCAS, page 261-265. IEEE, (2018)NBTI/PBTI-aware wordline voltage control with no boosted supply for stability improvement of half-selected SRAM cells., , , and . ISOCC, page 200-203. IEEE, (2012)An 8T SRAM With On-Chip Dynamic Reliability Management and Two-Phase Write Operation in 28-nm FDSOI., , , and . IEEE J. Solid State Circuits, 54 (7): 2091-2101 (2019)Advanced In-Design Auto-Fixing Flow for Cell Abutment Pattern Matching Weakpoints., , , , , , and . CoRR, (2018)0.2 V 8T SRAM with improved bitline sensing using column-based data randomization., , , , and . A-SSCC, page 141-144. IEEE, (2014)A 16kb column-based split cell-VSS, data-aware write-assisted 9T ultra-low voltage SRAM with enhanced read sensing margin in 28nm FDSOI., , and . A-SSCC, page 165-168. IEEE, (2017)0.2 V 8T SRAM With PVT-Aware Bitline Sensing and Column-Based Data Randomization., , , , , and . IEEE J. Solid State Circuits, 51 (6): 1487-1498 (2016)A System for Standard Cell Routability Checking and Placement Routability Improvements., , , , , and . APCCAS, page 125-128. IEEE, (2019)