Author of the publication

A 745pA Hybrid Asynchronous Binary-Searching and Synchronous Linear-Searching Digital LDO with 3.8×105 Dynamic Load Range, 99.99% Current Efficiency, and 2mV Output Voltage Ripple.

, and . ISSCC, page 232-234. IEEE, (2019)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Soft errors: Reliability challenges in energy-constrained ULP body sensor networks applications., , and . IOLTS, page 209-210. IEEE, (2017)A 2.6 µW sub-threshold mixed-signal ECG SoC., , , , and . ISLPED, page 117-118. ACM, (2009)Multiple Combined Write-Read Peripheral Assists in 6T FinFET SRAMs for Low-VMIN IoT and Cognitive Applications., , and . ISLPED, page 32:1-32:6. ACM, (2018)5T SRAM With Asymmetric Sizing for Improved Read Stability., and . IEEE J. Solid State Circuits, 46 (10): 2431-2442 (2011)A 1.5 nW, 32.768 kHz XTAL Oscillator Operational From a 0.3 V Supply., , and . IEEE J. Solid State Circuits, 51 (3): 686-696 (2016)Tracking On-Chip Age Using Distributed, Embedded Sensors., , , , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 20 (11): 1974-1985 (2012)Enhanced Interference Rejection Bluetooth Low-Energy Back-Channel Receiver With LO Frequency Hopping., , , , , and . IEEE J. Solid State Circuits, 54 (7): 2019-2027 (2019)Static noise margin variation for sub-threshold SRAM in 65-nm CMOS., and . IEEE J. Solid State Circuits, 41 (7): 1673-1679 (2006)An energy-efficient near/sub-threshold FPGA interconnect architecture using dynamic voltage scaling and power-gating., , and . FPT, page 20-27. IEEE, (2016)A 71% efficient energy harvesting and power management unit for sub-μW power biomedical applications., and . BioCAS, page 1-4. IEEE, (2017)