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Top Picks from the 2015 Computer Architecture Conferences., and . IEEE Micro, 36 (3): 6-9 (2016)WatchdogLite: Hardware-Accelerated Compiler-Based Pointer Checking., , and . CGO, page 175. ACM, (2014)InvisiFence: performance-transparent memory ordering in conventional multiprocessors., , and . ISCA, page 233-244. ACM, (2009)Using Destination-Set Prediction to Improve the Latency/Bandwidth Tradeoff in Shared-Memory Multiprocessors., , , , and . ISCA, page 206-217. IEEE Computer Society, (2003)NoSQ: Store-Load Communication without a Store Queue., , and . MICRO, page 285-296. IEEE Computer Society, (2006)Token tenure: PATCHing token counting using directory-based cache coherence., , and . MICRO, page 47-58. IEEE Computer Society, (2008)Why on-chip cache coherence is here to stay., , and . Commun. ACM, 55 (7): 78-89 (2012)Subtleties of Transactional Memory Atomicity Semantics., , and . IEEE Comput. Archit. Lett., (2006)Simulating a $2M Commercial Server on a $2K PC., , , , , , , and . Computer, 36 (2): 50-57 (2003)Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset., , , , , , , , and . SIGARCH Comput. Archit. News, 33 (4): 92-99 (2005)