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Disambiguation of "Lee, Kwangho"

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A 10-Gb/s, 0.03-mm2, 1.28-pJ/bit Half-Rate Injection-Locked CDR With Path Mismatch Tracking Loop in a 28-nm CMOS Technology.

, , , , , and . IEEE J. Solid State Circuits, 54 (10): 2812-2822 (2019)

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To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Xavier Lee Lee

Bongsoo Lee

The role of negative regulators in coordination of the Myxococcus xanthus developmental program. Uni Marburg, (2009)

Min-Hi Lee

Induction and regulation of antiviral defence mechanisms through intracytoplasmic sensors. HU Berlin, (2009)

Clara Lee

Viktor Lee

 

Other publications of authors with the same name

Using board games to improve mathematical creativity., and . Int. J. Knowl. Learn., 12 (1): 49-58 (2017)Cross-Domain Style Mixing for Face Cartoonization., , , , , , and . CoRR, (2022)A 10-Gb/s, 0.03-mm2, 1.28-pJ/bit Half-Rate All-Digital Injection-Locked Clock and Data Recovery with Maximum Timing-Margin Tracking Loop., , , , and . A-SSCC, page 73-76. IEEE, (2018)A 10-Gb/s, 0.03-mm2, 1.28-pJ/bit Half-Rate Injection-Locked CDR With Path Mismatch Tracking Loop in a 28-nm CMOS Technology., , , , , and . IEEE J. Solid State Circuits, 54 (10): 2812-2822 (2019)The effect of contents on sixth graders' understanding about the height of triangles., and . Int. J. Knowl. Learn., 12 (4): 352-361 (2018)An Optimum Injection-Timing Tracking Loop for 5-GHz, 1.13-mW/GHz RO-Based Injection-Locked PLL With 152-fs Integrated Jitter., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 65-II (12): 1819-1823 (2018)Design Techniques for 48-Gb/s 2.4-pJ/b PAM-4 Baud-Rate CDR With Stochastic Phase Detector., , , , and . IEEE J. Solid State Circuits, 57 (10): 3014-3024 (2022)A 64-Gb/s PAM-4 Receiver With Transition-Weighted Phase Detector., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (9): 3704-3708 (2022)Memory streaming acceleration for embedded systems with CPU-accelerator cooperative data processing., , , and . Microprocess. Microsystems, (2019)A 55.1 mW 1.62-to-8.1 Gb/s Video Interface Receiver Generating up to 680 MHz Stream Clock Over 20 dB Loss Channel., , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 64-II (12): 1432-1436 (2017)