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Simultaneous Reduction of Dynamic and Static Power in Scan Structures.

, , , , and . DATE, page 846-851. IEEE Computer Society, (2005)

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Advanced Variance Reduction and Sampling Techniques for Efficient Statistical Timing Analysis., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 29 (12): 1894-1907 (2010)Thermal Driven Placement for Island-style MTCMOS FPGAs., and . J. Comput., 3 (4): 24-30 (2008)Simultaneous Reduction of Dynamic and Static Power in Scan Structures., , , , and . DATE, page 846-851. IEEE Computer Society, (2005)Statistical Thermal Profile Considering Process Variations: Analysis and Applications., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (6): 1027-1040 (2008)Power grid analysis and verification considering temperature variations., , and . Microelectron. J., 43 (3): 189-197 (2012)Timing yield estimation of digital circuits using a control variate technique., and . ISQED, page 382-387. IEEE Computer Society, (2009)Variability-aware design of subthreshold devices., , and . ISCAS, page 1196-1199. IEEE, (2008)Variability-Aware Bulk-MOS Device Design., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (2): 205-216 (2008)On Efficient LHS-Based Yield Analysis of Analog Circuits., and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 30 (1): 159-163 (2011)Adaptive sampling for efficient failure probability analysis of SRAM cells., and . ICCAD, page 623-630. ACM, (2009)