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8.3 A power-scalable 7-tap FIR equalizer with tunable active delay line for 10-to-25Gb/s multi-mode fiber EDC in 28nm LP-CMOS.

, , , , , , and . ISSCC, page 142-143. IEEE, (2014)

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3.6 A 45Gb/s PAM-4 transmitter delivering 1.3Vppd output swing with 1V supply in 28nm CMOS FDSOI., , , , and . ISSCC, page 66-67. IEEE, (2016)12.2 A 4-Channel 200Gb/s PAM-4 BiCMOS Transceiver with Silicon Photonics Front-Ends for Gigabit Ethernet Applications., , , , , , , , , and 10 other author(s). ISSCC, page 210-212. IEEE, (2020)8.3 A power-scalable 7-tap FIR equalizer with tunable active delay line for 10-to-25Gb/s multi-mode fiber EDC in 28nm LP-CMOS., , , , , , and . ISSCC, page 142-143. IEEE, (2014)A low-noise programmable-gain amplifier for 25 Gb/s multi-mode fiber receivers in 28nm CMOS FDSOI., , , , and . ESSCIRC, page 160-163. IEEE, (2015)A High-Swing 45 Gb/s Hybrid Voltage and Current-Mode PAM-4 Transmitter in 28 nm CMOS FDSOI., , , , and . IEEE J. Solid State Circuits, 51 (11): 2702-2715 (2016)Analysis and Design of a Power-Scalable Continuous-Time FIR Equalizer for 10 Gb/s to 25 Gb/s Multi-Mode Fiber EDC in 28 nm LP CMOS., , , , , , and . IEEE J. Solid State Circuits, 49 (12): 3130-3140 (2014)A 6-bit 6-GS/s 95mW background calibrated flash ADC with integrating preamplifiers and half-rate comparators in 32nm LP CMOS., , , , , , and . ESSCIRC, page 129-132. IEEE, (2013)