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Disambiguation of "Maurine, Philippe"

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Delay-correlation-aware SSTA based on conditional moments.

, , , and . Microelectron. J., 43 (4): 263-273 (2012)

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Philippe Kersting

Philippe Bopp

Philippe Moisan

Philippe Zysset

Philippe Dreuw

 

Other publications of authors with the same name

Security evaluation of dual rail logic against DPA attacks., , , and . VLSI-SoC, page 181-186. IEEE, (2006)Gate Sizing for Low Power Design., , and . VLSI-SOC, volume 218 of IFIP Conference Proceedings, page 301-312. Kluwer, (2001)Circuit sizing method under delay constraint., , , and . ISCAS, IEEE, (2006)CMOS Gate Sizing under Delay Constraint., , , , and . PATMOS, volume 2799 of Lecture Notes in Computer Science, page 60-69. Springer, (2003)Performance Metric Based Optimization Protocol., , , , and . PATMOS, volume 3254 of Lecture Notes in Computer Science, page 100-109. Springer, (2004)Interest of MIA in frequency domain?, , , and . CS2@HiPEAC, page 35-38. ACM, (2015)Enhancing Electromagnetic Attacks Using Spectral Coherence Based Cartography., , , , and . VLSI-SoC, volume 360 of IFIP Advances in Information and Communication Technology, page 135-155. Springer, (2009)Logical effort model extension to propagation delay representation., , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 25 (9): 1677-1684 (2006)Practical Analysis of RSA Countermeasures Against Side-Channel Electromagnetic Attacks., , , and . CARDIS, volume 8419 of Lecture Notes in Computer Science, page 200-215. Springer, (2013)Electromagnetic Fault Injection : How Faults Occur., , and . FDTC, page 9-16. IEEE, (2019)