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A framework for automated and optimized ASIP implementation supporting multiple hardware description languages.

, , , , , , and . ASP-DAC, page 280-285. ACM Press, (2005)

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OCP TLM for Architectural Modelling., and . FDL, page 225-244. ECSI, (2005)A framework for fast hardware-software co-simulation., , and . DATE, page 760-765. IEEE Computer Society, (2001)Guest Editorial: Communication-Aware Designs and Methodologies for Reliable and Adaptable On-Chip AI SubSystems and Accelerators., , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 10 (3): 265-267 (2020)Virtual prototyping of embedded platforms for wireless and multimedia., and . DATE, page 488-490. European Design and Automation Association, Leuven, Belgium, (2006)From milliwatts to megawatts: system level power challenge., , , , , , , and . DAC, page 750-751. ACM, (2009)A highly efficient modeling style for heterogeneous bus architectures., , , , and . SoC, page 83-87. IEEE, (2003)From ESL 2010 to ESL 2015., , , , , and . CODES+ISSS, page 61-62. ACM, (2010)Heterogeneous MP-SoC: the solution to energy-efficient signal processing., and . DAC, page 686-691. ACM, (2004)ESL hand-off: fact or EDA fiction?, , , , , , , , and . DAC, page 310-312. ACM, (2008)AMAIX: A Generic Analytical Model for Deep Learning Accelerators., , , , and . SAMOS, volume 12471 of Lecture Notes in Computer Science, page 36-51. Springer, (2020)