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Disambiguation of "Uematsu, Ryota"

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Area and Energy Optimization for Bit-Serial Log-Quantized DNN Accelerator with Shared Accumulators.

, , , , , , , , , and . MCSoC, page 237-243. IEEE Computer Society, (2018)

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Ryota Gemma

Ryota Gemma

 

Other publications of authors with the same name

Body Core Temperature Estimation Using New Compartment Model With Vital Data From Wearable Devices., , , , , , , , , and . IEEE Access, (2021)Closed-loop identification of plant and disturbance models based on generalized minimum variance evaluation., , and . CCA, page 175-180. IEEE, (2015)Closed-loop Identification and Dead Time Estimation Based on Generalized Minimum Variance Evaluation., and . ECC, page 2364-2369. IEEE, (2021)Accelerating deep learning by binarized hardware., , , , , , , and . APSIPA, page 1045-1051. IEEE, (2017)Dither NN: Hardware/Algorithm Co-Design for Accurate Quantized Neural Networks., , , , , , , , , and . IEICE Trans. Inf. Syst., 102-D (12): 2341-2353 (2019)Logarithmic Compression for Memory Footprint Reduction in Neural Network Training., , , , , , , , and . CANDAR, page 291-297. IEEE Computer Society, (2017)Closed-loop Identification and Periodic Disturbance Estimation Based on Generalized Minimum Variance Evaluation., and . ICSTCC, page 582-587. IEEE, (2021)Area and Energy Optimization for Bit-Serial Log-Quantized DNN Accelerator with Shared Accumulators., , , , , , , , , and . MCSoC, page 237-243. IEEE Computer Society, (2018)Dither NN: An Accurate Neural Network with Dithering for Low Bit-Precision Hardware., , , , , , , , , and . FPT, page 6-13. IEEE, (2018)