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Disambiguation of "Banihashemi, Amir H."

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Counting Short Cycles in Bipartite Graphs: A Fast Technique/Algorithm and a Hardness Result.

, and . IEEE Trans. Commun., 68 (3): 1378-1390 (2020)

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Sara Banihashemi

Seyed Hashem Banihashemi

Manutschehr Amirfeyz

Iradj Amirzadeh-Asl

Mahmud Amirian-Khaffadjeh

 

Other publications of authors with the same name

Lower Bounds on the Size of Smallest Elementary and Non-Elementary Trapping Sets in Variable-Regular LDPC Codes., and . IEEE Communications Letters, 21 (9): 1905-1908 (2017)Efficient Feedback-Based Scheduling Policies for Chunked Network Codes over Networks with Loss and Delay, and . CoRR, (2012)Deterministic Design of Low-Density Parity-Check Codes for Binary Erasure Channels, and . CoRR, (2008)Symmetrical Constructions for Regular Girth-8 QC-LDPC Codes., , and . IEEE Trans. Commun., 65 (1): 14-22 (2017)Design of Finite-Length Irregular Protograph Codes with Low Error Floors over the Binary-Input AWGN Channel Using Cyclic Liftings., , and . IEEE Trans. Commun., 60 (4): 902-907 (2012)A 0.18-$muhbox m$CMOS Analog Min-Sum Iterative Decoder for a (32, 8) Low-Density Parity-Check (LDPC) Code., , and . IEEE J. Solid State Circuits, 41 (11): 2531-2540 (2006)ADMM Check Node Penalized Decoders for LDPC Codes., and . IEEE Trans. Commun., 69 (6): 3528-3540 (2021)Reliability-based schedule for decoding low-density parity-check codes., and . ICC, page 444-447. IEEE, (2004)On weighting/reweighting schemes for approximate message passing algorithms., , and . ICC, page 1-5. IEEE, (2016)Design of irregular quasi-cyclic protograph codes with low error floors., , and . ISIT, page 908-912. IEEE, (2011)