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Disambiguation of "Kawahara, Takayuki"

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Internal voltage generator for low voltage, quarter-micrometer flash memories.

, , , , , and . IEEE J. Solid State Circuits, 33 (1): 126-132 (1998)

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Takayuki Sugimoto

Takayuki Sugimoto

Takayuki Shindo

Takayuki Saito

 

Other publications of authors with the same name

Electric-energy generation using variable-capacitive resonator for power-free LSI: efficiency analysis and fundamental experiment., , , , , , and . ISLPED, page 193-198. ACM, (2003)Scalable Spin-Transfer Torque RAM Technology for Normally-Off Computing.. IEEE Des. Test Comput., 28 (1): 52-63 (2011)A large-scale and low-power CAM architecture featuring a one-hot-spot block code for IP-address lookup in a network router., , , , and . IEEE J. Solid State Circuits, 40 (4): 853-861 (2005)A 32-Mb SPRAM With 2T1R Memory Cell, Localized Bi-Directional Write Driver and '1'/'0' Dual-Array Equalized Reference Scheme., , , , , , , , , and 4 other author(s). IEEE J. Solid State Circuits, 45 (4): 869-879 (2010)Bit-line clamped sensing multiplex and accurate high voltage generator for quarter-micron flash memories., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 31 (11): 1590-1600 (1996)Review and future prospects of low-voltage RAM circuits., , , and . IBM J. Res. Dev., 47 (5-6): 525-552 (2003)Scalable Fully-Coupled Annealing Processing System Implementing 4096 Spins Using 22nm CMOS LSI., , and . IEEE Access, (2024)FPGA Implementation of Support Vector Machine Using Ising Model for AI on Things., , and . CIVEMSA, page 1-5. IEEE, (2021)Low-voltage limitations of deep-sub-100-nm CMOS LSIs: view of memory designers., , and . ACM Great Lakes Symposium on VLSI, page 529-533. ACM, (2007)2Mb Spin-Transfer Torque RAM (SPRAM) with Bit-by-Bit Bidirectional Current Write and Parallelizing-Direction Current Read., , , , , , , , , and 4 other author(s). ISSCC, page 480-617. IEEE, (2007)