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Disambiguation of "Bourennane, El-Bay"

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Implementation of a Real Time Image Rotation using B-Spline Interpolation on FPGA's Board.

, , , and . ICIP (3), page 995-999. IEEE Computer Society, (1998)

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Walid Bourennane

Volker Bay

Erich Bay

Christian Bay

Hansjörg Bay

 

Other publications of authors with the same name

Implementation of a Real Time Image Rotation using B-Spline Interpolation on FPGA's Board., , , and . ICIP (3), page 995-999. IEEE Computer Society, (1998)High-level modelling and automatic generation of dynamicaly reconfigurable systems., , , and . DASIP, page 332-339. IEEE, (2011)Model-Driven Approach for Automatic Dynamic Partially Reconfigurable IP Customization., , , and . IPDPS Workshops, page 407-412. IEEE Computer Society, (2012)Revisiting the High-Performance Reconfigurable Computing for Future Datacenters., , , and . Future Internet, 12 (4): 64 (2020)Ontology and protocol secure for SCADA., , and . Int. J. Metadata Semant. Ontologies, 9 (2): 114-127 (2014)Fully pipelined real time hardware solution for High Efficiency Video Coding (HEVC) intra prediction., and . J. Syst. Archit., (2016)A collision management structure for NoC deployment on multi-FPGA., , , , and . Microprocess. Microsystems, (2017)Classification Boundary Approximation by Using Combination of Training Steps for Real-Time Image Segmentation., , and . MLDM, volume 2734 of Lecture Notes in Computer Science, page 141-155. Springer, (2003)SystemC Transaction-Level Modeling of an MPSoC Platform Based on an Open Source ISS by Using Interprocess Communication., and . Int. J. Reconfigurable Comput., (2008)Approches région et bayésienne pour la restauration ďimages dégradées par la turbulence atmosphérique., , and . Ann. des Télécommunications, 56 (9-10): 538-549 (2001)