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G-QED: Generalized QED Pre-silicon Verification beyond Non-Interfering Hardware Accelerators., , , , , , , , , and 2 other author(s). DAC, page 1-6. IEEE, (2023)Generator IP-reuse and Automated Infrastructure Generation for Model-based Full-Chip Generation., , , and . MBMV, page 1-12. VDE/IEEE, (2023)Bits, Flips and RISCs., , , , , , , , , and 3 other author(s). DDECS, page 140-149. IEEE, (2023)A Scalable, Configurable and Programmable Vector Dot-Product Unit for Edge AI., , , , and . MBMV, page 1-9. VDE/IEEE, (2022)Parallel Golomb-Rice Decoder with 8-bit Unary Decoding for Weight Compression in TinyML Applications., , , , and . DSD, page 227-234. IEEE, (2023)Transformative Hardware Design Following the Model-Driven Architecture Vision., , , , , , , and . VLSI-SoC (Selected Papers), volume 661 of IFIP Advances in Information and Communication Technology, page 49-70. Springer, (2021)Aspect-Oriented Design Automation with Model Transformation., , , , , , , and . VLSI-SoC, page 1-6. IEEE, (2021)Optimized HW/FW Generation from an Abstract Register Interface Model., , , , , and . DSD, page 35-39. IEEE, (2020)A Smart HW-Accelerator for Non-uniform Linear Interpolation of ML-Activation Functions., , , and . SAMOS, volume 13511 of Lecture Notes in Computer Science, page 267-282. Springer, (2022)RTL Delay Prediction Using Neural Networks., , , , and . NorCAS, page 1-7. IEEE, (2021)