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Disambiguation of "Själander, Magnus"

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Improving processor efficiency by statically pipelining instructions.

, , , , , , and . LCTES, page 33-44. ACM, (2013)

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Magnus Pielke

Magnus Pahl

Arthur Magnus

Dietrich Magnus

Magnus Klarer

 

Other publications of authors with the same name

BISDU: A Bit-Serial Dot-Product Unit for Microcontrollers., , and . ACM Trans. Embed. Comput. Syst., 22 (5): 79:1-79:22 (September 2023)STIFF: thermally safe temperature effect inversion aware FinFET based multi-core., , and . CF, page 21-29. ACM, (2022)Efficient invisible speculative execution through selective delay and value prediction., , , , and . ISCA, page 723-735. ACM, (2019)Architecting Selective Refresh based Multi-Retention Cache for Heterogeneous System (ARMOUR)., , and . DAC, page 1-6. IEEE, (2023)Power-Efficient Computer Architectures: Recent Advances, , and . Synthesis Lectures on Computer Architecture Morgan & Claypool Publishers, (2014)Double Throughput Multiply-Accumulate unit for FlexCore processor enhancements., , and . IPDPS, page 1-7. IEEE, (2009)A High-Speed, Energy-Efficient Two-Cycle Multiply-Accumulate (MAC) Architecture and Its Application to a Double-Throughput MAC Unit., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 57-I (12): 3073-3081 (2010)A low-leakage twin-precision multiplier using reconfigurable power gating., , , and . ISCAS (2), page 1654-1657. IEEE, (2005)Optimizing Bit-Serial Matrix Multiplication for Reconfigurable Computing., , , , and . ACM Trans. Reconfigurable Technol. Syst., 12 (3): 15:1-15:24 (2019)On Value Recomputation to Accelerate Invisible Speculation., , , , , , , and . CoRR, (2021)