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Designing an Operating System for a Heterogeneous Reconfigurable So.

, , , , and . IPDPS, page 174. IEEE Computer Society, (2003)

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Interconnect architectures for modulo-scheduled coarse-grained reconfigurable arrays., , , and . FPT, page 33-40. IEEE, (2004)Building a Virtual Framework for Networked Reconfigurable Hardware and Software Objects., , , , , and . J. Supercomput., 21 (2): 131-144 (2002)Adding Hardware Support to the HotSpot Virtual Machine for Domain Specific Applications., , , , , , and . FPL, volume 2438 of Lecture Notes in Computer Science, page 1135-1138. Springer, (2002)A SW/HW Interface API for Java/FPGA Co-Designed Applets., , , , , and . FCCM, page 269-270. IEEE Computer Society, (2001)Operating-system controlled network on chip., , , , and . DAC, page 256-259. ACM, (2004)Low Power Digital Frequency Conversion Architectures., , , and . J. VLSI Signal Process., 18 (2): 187-197 (1998)Virtual Java/FPGA interface for networked reconfiguration., , , , , , and . ASP-DAC, page 558-563. ACM, (2001)Design Methodology for a Tightly Coupled VLIW/Reconfigurable Matrix Architecture: A Case Study., , , and . DATE, page 1224-1229. IEEE Computer Society, (2004)A Hardware Virtual Machine for the Networked Reconfiguration., , , , , , and . IEEE International Workshop on Rapid System Prototyping, page 194-199. IEEE Computer Society, (2000)A Technique for Combined Virtual Prototyping and Hardware Design., , , , , and . International Workshop on Rapid System Prototyping, page 156-161. IEEE Computer Society, (1998)