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Automatic testing of analog ICs for latent defects using topology modification., , , , , and . ETS, page 1-6. IEEE, (2017)Architectural Analysis of a Novel Closed-Loop VCO-Based 1-1 Sturdy MASH Sensor-to-Digital Converter., , and . SMACD, page 261-264. IEEE, (2019)An intelligent design system for analogue integrated circuits., , and . EURO-DAC, page 169-173. IEEE Computer Society, (1990)Impact of transistor aging on RF low noise amplifier performance of 28nm technology: Reliability assessment., and . ICECS, page 413-416. IEEE, (2013)Extracting analytical nonlinear models from analog circuits by recursive vector fitting of transfer function trajectories., , , and . DATE, page 1448-1453. EDA Consortium San Jose, CA, USA / ACM DL, (2013)A column-and-row-parallel CMOS image sensor with thermal and 1/f noise suppression techniques., , and . ESSCIRC, page 221-224. IEEE, (2016)Automatic generation of autonomous built-in observability structures for analog circuits., , , , and . ETS, page 1-6. IEEE, (2015)Optimal Design Methodology for High-Order Continuous-Time Wideband Delta-Sigma Converters., , , , , and . ICECS, page 743-746. IEEE, (2007)Modeling of the Power-supply Interactions of CMOS Operational Amplifiers Using Symbolic Computation., and . ISCAS, page 1381-1384. IEEE, (1993)A novel operating-point driven method for the sizing of analog IC., , , and . ISCAS, page 781-784. IEEE, (2011)