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Hardware-efficient stochastic rounding unit design for DNN training: late breaking results.

S. Chang, G. Yuan, A. Lu, M. Sun, Y. Li, X. Ma, Z. Li, Y. Xie, M. Qin, X. Lin, Z. Fang, and Y. Wang. DAC, page 1396-1397. ACM, (2022)

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Fang-Fang Tang

Fang Chen

Xing Fang

Weigui Fang

Fang Wang

Other publications of authors with the same name

ARAPrototyper: Enabling Rapid Prototyping and Evaluation for Accelerator-Rich Architecture (Abstact Only).Y. Chen, J. Cong, Z. Fang, and P. Zhou. FPGA, page 281. ACM, (2016)Introduction to the Special Section on High-level Synthesis for FPGA: Next-generation Technologies and Applications.C. Pilato, Z. Fang, Y. Hara-Azumi, and J. Hwang. ACM Trans. Design Autom. Electr. Syst., 27 (4): 29:1-29:2 (2022)Measuring Microarchitectural Details of Multi- and Many-Core Memory Systems through Microbenchmarking.Z. Fang, S. Mehta, P. Yew, A. Zhai, J. Greensky, G. Beeraka, and B. Zang. ACM Trans. Archit. Code Optim., 11 (4): 55:1-55:26 (2014)A quantitative analysis on microarchitectures of modern CPU-FPGA platforms.Y. kyu Choi, J. Cong, Z. Fang, Y. Hao, G. Reinman, and P. Wei. DAC, page 109:1-109:6. ACM, (2016)HyBNN: Quantifying and Optimizing Hardware Efficiency of Binary Neural Networks.G. Yang, J. Lei, Z. Fang, Y. Li, J. Zhang, and W. Xie. FCCM, page 203. IEEE, (2023)SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.S. Panchapakesan, Z. Fang, and J. Li. FPL, page 286-293. IEEE, (2021)FILM-QNN: Efficient FPGA Acceleration of Deep Neural Networks with Intra-Layer, Mixed-Precision Quantization.M. Sun, Z. Li, A. Lu, Y. Li, S. Chang, X. Ma, X. Lin, and Z. Fang. FPGA, page 134-145. ACM, (2022)Hardware-efficient stochastic rounding unit design for DNN training: late breaking results.S. Chang, G. Yuan, A. Lu, M. Sun, Y. Li, X. Ma, Z. Li, Y. Xie, M. Qin, X. Lin and 2 other author(s). DAC, page 1396-1397. ACM, (2022)Journal Track Paper ICFPT 2023 : HyBNN: Quantifying and Optimizing Hardware Efficiency of Binary Neural Networks.G. Yang, J. Lei, Z. Fang, Y. Li, J. Zhang, and W. Xie. ICFPT, page 3-4. IEEE, (2023)High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms.W. Qiao, J. Du, Z. Fang, M. Lo, M. Chang, and J. Cong. FCCM, page 37-44. IEEE Computer Society, (2018)

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Disambiguation of "Fang, Zhenman"

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Hardware-efficient stochastic rounding unit design for DNN training: late breaking results.

Please choose a person to relate this publication to

Fang-Fang Tang

Fang Chen

Xing Fang

Weigui Fang

Fang Wang

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Fang, Zhenman"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Hardware-efficient stochastic rounding unit design for DNN training: late breaking results.

Please choose a person to relate this publication to

Fang-Fang Tang

Fang Chen

Xing Fang

Weigui Fang

Fang Wang

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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Hardware-efficient stochastic rounding unit design for DNN training: late breaking results.