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Java and the Power of Multi-Core Processing., and . CISIS, page 627-631. IEEE Computer Society, (2008)Superimposed in-circuit debugging for self-healing FPGA overlays., and . LATS, page 1-6. IEEE, (2018)Adaptive and reconfigurable fault-tolerant routing method for 2D Networks-on-Chip., and . ReConFig, page 1-8. IEEE, (2014)The Hamiltonian-based odd-even turn model for adaptive routing in interconnection networks., and . ReConFig, page 1-6. IEEE, (2013)Staticroute: A novel router for the Dynamic Partial Reconfiguration of FPGAS., , and . FPL, page 1-7. IEEE, (2013)Efficient implementation of Virtual Coarse Grained Reconfigurable Arrays on FPGAS., , , , and . FPL, page 1-8. IEEE, (2013)RecoNoC: A reconfigurable network-on-chip., , , , and . ReCoSoC, page 1-2. IEEE, (2011)Modeling multiple autonomous robot behaviors and behavior switching with a single reservoir computing network., , and . SMC, page 1843-1848. IEEE, (2008)Constructing Application-Specific Memory Hierarchies on FPGAs., , , and . Trans. High Perform. Embed. Archit. Compil., (2011)Finding and Applying Loop Transformations for Generating Optimized FPGA Implementations., , , , , and . Trans. High Perform. Embed. Archit. Compil., (2007)