Author of the publication

An Approach to Minimize the Test Configuration for the Logic Cells of the Xilinx XC4000 FPGAs Family.

, , , and . J. Electron. Test., 16 (3): 289-299 (2000)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A New FPGA for DSP Applications Integrating BIST Capabilities., , , and . J. Electron. Test., 20 (4): 423-431 (2004)Guest Editorial., , and . J. Electron. Test., 21 (3): 203 (2005)On the detectability of CMOS floating gate transistor faults., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 20 (1): 116-128 (2001)New implementions of predictive alternate analog/RF test with augmented model redundancy., , , , , and . DATE, page 1-4. European Design and Automation Association, (2014)Smart selection of indirect parameters for DC-based alternate RF IC testing., , , , , , , and . VTS, page 19-24. IEEE Computer Society, (2012)Evaluation of indirect measurement selection strategies in the context of analog/RF alternate testing., , , , , and . LATW, page 1-6. IEEE, (2014)Fully digital test solution for a set of ADCs and DACs embedded in a SIP or SOC., , , , , and . IET Comput. Digit. Tech., 1 (3): 146-153 (2007)A high accuracy triangle-wave signal generator for on-chip ADC testing., , , and . ETW, page 89-94. IEEE Computer Society, (2002)A Specific Test Methodology for Symmetric SRAM-Based FPGAs.. FPL, volume 1896 of Lecture Notes in Computer Science, page 300-311. Springer, (2000)Test configurations to enhance the testability of sequential circuits., , , and . Asian Test Symposium, page 160-168. IEEE Computer Society, (1995)