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A 65 nm 0.5 V DPS CMOS Image Sensor With 17 pJ/Frame.Pixel and 42 dB Dynamic Range for Ultra-Low-Power SoCs.

, , , , , and . IEEE J. Solid State Circuits, 50 (10): 2419-2430 (2015)

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A 65-nm 0.5-V 17-pJ/frame.pixel DPS CMOS image sensor for ultra-low-power SoCs achieving 40-dB dynamic range., , , , and . VLSIC, page 1-2. IEEE, (2014)A 65 nm 0.5 V DPS CMOS Image Sensor With 17 pJ/Frame.Pixel and 42 dB Dynamic Range for Ultra-Low-Power SoCs., , , , , and . IEEE J. Solid State Circuits, 50 (10): 2419-2430 (2015)SleepTalker: A 28nm FDSOI ULV 802.15.4a IR-UWB transmitter SoC achieving 14pJ/bit at 27Mb/s with adaptive-FBB-based channel selection and programmable pulse shape., , , , , and . VLSI Circuits, page 1-2. IEEE, (2016)CAMEL: An Ultra-Low-Power VGA CMOS Imager based on a Time-Based DPS Array., , , , , and . ICDSC, page 155-159. ACM, (2016)Impact of back gate biasing schemes on energy and robustness of ULV logic in 28nm UTBB FDSOI technology., and . ISLPED, page 255-260. IEEE, (2013)Sizing and layout integrated optimizer for 28nm analog circuits using digital PnR tools., , and . NEWCAS, page 1-4. IEEE, (2016)SleepTalker: A ULV 802.15.4a IR-UWB Transmitter SoC in 28-nm FDSOI Achieving 14 pJ/b at 27 Mb/s With Channel Selection Based on Adaptive FBB and Digitally Programmable Pulse Shaping., , , , , , and . IEEE J. Solid State Circuits, 52 (4): 1163-1177 (2017)Towards Securing Low-Power Digital Circuits with Ultra-Low-Voltage Vdd Randomizers., , , , , , and . SPACE, volume 10076 of Lecture Notes in Computer Science, page 233-248. Springer, (2016)