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A Near Optimal Integrated Solution for Resource Constrained Scheduling, Binding and Routing on CGRAs.

, , and . IPDPS Workshops, page 213-218. IEEE Computer Society, (2017)

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Optimization of the Memory Subsystem of a Coarse Grained Reconfigurable Hardware Accelerator.. Darmstadt University of Technology, Germany, (2019)Update or Invalidate: Influence of Coherence Protocols on Configurable HW Accelerators., , and . ARC, volume 11444 of Lecture Notes in Computer Science, page 305-316. Springer, (2019)