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Disambiguation of "Bhattacharyya, A. B."

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LATCHSIM - A Lath-Up Simulator in VLSI CAD Environment for CMOS and BiCMOS Circuits.

, , , and . VLSI Design, page 339-342. IEEE Computer Society, (1994)

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Somnath Bhattacharyya

Abinaschchandra Bhattacharyya

Arnab Bhattacharyya

Paulina B a ejewska

Julia A B Hegewald

 

Other publications of authors with the same name

Delay time sensitivity in nonlinear monotone RC trees., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 9 (5): 554-560 (1990)Compact MOSFET Models for Low Power Analog CMOS Design.. VLSI Design, page 15. IEEE Computer Society, (2005)A micropower analog hearing aid on low voltage CMOS digital process., , , , , , , , , and 1 other author(s). VLSI Design, page 85-89. IEEE Computer Society, (1996)Extended-Sakurai-Newton MOSFET Model for Ultra-Deep-Submicrometer CMOS Digital Design., , and . VLSI Design, page 247-252. IEEE Computer Society, (2009)PREDICTMOS MOSFET Model and its Application to Submicron CMOS Inverter Delay Analysis., and . ASP-DAC/VLSI Design, page 207-212. IEEE Computer Society, (2002)Analysis of Second-Order Effect Components of Drain Conductance and Its Implication on Output Resistance of Wilson Current Mirror., and . VLSID, page 529-534. IEEE Computer Society, (2015)LATCHSIM - A Lath-Up Simulator in VLSI CAD Environment for CMOS and BiCMOS Circuits., , , and . VLSI Design, page 339-342. IEEE Computer Society, (1994)Sub-Circuit Analysis for Power Supply Rejection Ratio in Regulated Cascode Operational Transconductance Amplifiers and Filters., and . VLSI Design, page 164-168. IEEE Computer Society, (1999)CPM Pole-Zero Computation Using The Generalized Eigenproblem Approach., and . VLSI Design, page 277-280. IEEE Computer Society, (1992)