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NURBS interpolator with confined chord error and tangential and centripetal acceleration control.

, , , and . ICUMT, page 489-496. IEEE, (2010)

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Analysis of embedded video coder systems: a system-level approach., , , and . SIGARCH Comput. Archit. News, 34 (1): 71-76 (2006)Performance Sensitivity of NUCA Caches to On-Chip Network Parameters., , , , and . SBAC-PAD, page 167-174. IEEE Computer Society, (2008)Energy Behaviour of NUCA Caches in CMPs., , , , and . DSD, page 746-753. IEEE Computer Society, (2011)Analysis of static and dynamic energy consumption in NUCA caches: initial results., , , and . MEDEA@PACT, page 105-112. ACM, (2007)Evaluation of Leakage Reduction Alternatives for Deep Submicron Dynamic Nonuniform Cache Architecture Caches., , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (1): 185-190 (2014)NURBS interpolator with confined chord error and tangential and centripetal acceleration control., , , and . ICUMT, page 489-496. IEEE, (2010)Impact of on-chip network parameters on nuca cache performances., , , , and . IET Comput. Digit. Tech., 3 (5): 501-512 (2009)A technique for reducing power consumption of wire delay tolerant cache memories.. University of Pisa, Italy, (2009)A power-efficient migration mechanism for D-NUCA caches., , , , and . DATE, page 598-601. IEEE, (2009)Leveraging Data Promotion for Low Power D-NUCA Caches., , , , , and . DSD, page 307-316. IEEE Computer Society, (2008)