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Disambiguation of "Chang, Tsin-Yuan"

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A Probabilistic Estimation Bias Circuit for Fixed-Width Booth Multiplier and Its DCT Applications.

, , , and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (4): 215-219 (2011)

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Yuan Chang

Che-Yuan Chang

Pao-Yüan Chang

Yuan-Chuan Chang

Lydia Tsintsafa

 

Other publications of authors with the same name

High Throughput DA-Based DCT With High Accuracy Error-Compensated Adder Tree., , and . IEEE Trans. Very Large Scale Integr. Syst., 19 (4): 709-714 (2011)A High-Accuracy Adaptive Conditional-Probability Estimator for Fixed-Width Booth Multipliers., and . IEEE Trans. Circuits Syst. I Regul. Pap., 59-I (3): 594-603 (2012)A design for concurrent error detections in FPLAs., , , and . Great Lakes Symposium on VLSI, page 9-15. IEEE, (1992)An Embedded Built-In-Self-Test Approach for Analog-to-Digital Converters., , and . Asian Test Symposium, page 266-. IEEE Computer Society, (2002)SoC Testing and P1500 Standard., and . Asian Test Symposium, page 492. IEEE Computer Society, (2000)IEEE Standard 1500 Compatible Delay Test Framework., , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (8): 1152-1156 (2009)Period Extension and Randomness Enhancement Using High-Throughput Reseeding-Mixing PRNG., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 20 (2): 385-389 (2012)High-Throughput Multistandard Transform Core Supporting MPEG/H.264/VC-1 Using Common Sharing Distributed Arithmetic., , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (3): 463-474 (2014)Design of Repairable and Fully Diagnosable Folded PLAs for Yield Enhancement., , and . DAC, page 327-332. IEEE Computer Society Press, (1990)An Area- and Energy-Efficient Multimode FFT Processor for WPAN/WLAN/WMAN Systems., , and . IEEE J. Solid State Circuits, 47 (6): 1419-1435 (2012)