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Communication-aware Quantization for Deep Learning Inference Parallelization on Chiplet-based Accelerators.

, , , , , and . ICPADS, page 1123-1130. IEEE, (2023)

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An Automated Quantization Framework for High-Utilization RRAM-Based PIM., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (3): 583-596 (2022)CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators., , , , , , and . CoRR, (2024)InfoX: an energy-efficient ReRAM accelerator design with information-lossless low-bit ADCs., , , , , and . DAC, page 97-102. ACM, (2022)Processing-in-SRAM acceleration for ultra-low power visual 3D perception., , , , , and . DAC, page 295-300. ACM, (2022)ENASA: Towards Edge Neural Architecture Search based on CIM acceleration., , , and . DATE, page 1-2. IEEE, (2023)ASBP: Automatic Structured Bit-Pruning for RRAM-based NN Accelerator., , , and . DAC, page 745-750. IEEE, (2021)A Coordinated Model Pruning and Mapping Framework for RRAM-Based DNN Accelerators., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (7): 2364-2376 (July 2023)CAP: Communication-Aware Automated Parallelization for Deep Learning Inference on CMP Architectures., , , , , and . IEEE Trans. Computers, 71 (7): 1626-1639 (2022)RaQu: An automatic high-utilization CNN quantization and mapping framework for general-purpose RRAM Accelerator., , , , , and . DAC, page 1-6. IEEE, (2020)Communication-aware Quantization for Deep Learning Inference Parallelization on Chiplet-based Accelerators., , , , , and . ICPADS, page 1123-1130. IEEE, (2023)