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Disambiguation of "Chien, Shao-Yi"

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Power optimization of wireless video sensor nodes in M2M networks.

, , , , , , and . ASP-DAC, page 401-405. IEEE, (2012)

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Chieh Chien

Rey-Djin Chien

Chih-Te Chien

Hung-Ju Chien

Ting-Chou Chien

 

Other publications of authors with the same name

Subword Parallel Architecture for Connected Component Labeling and Morphological Operations., and . APCCAS, page 936-939. IEEE, (2006)Efficient Architecture Design of Motion-Compensated Temporal Filtering/Motion Compensated Prediction Engine., , , , , and . IEEE Trans. Circuits Syst. Video Techn., 18 (1): 98-109 (2008)Architecture Design of Convolutional Neural Networks for Face Detection on an FPGA Platform., , , , and . SiPS, page 88-93. IEEE, (2018)Architecture Design of Fine Grain Quality Scalable Encoder with CABAC for H.264/AVC Scalable Extension., , , , and . J. Signal Process. Syst., 60 (3): 363-375 (2010)Learning a Code-Space Predictor by Exploiting Intra-Image-Dependencies., , , and . BMVC, page 124. BMVA Press, (2018)Orientation-Aware Vehicle Re-Identification with Semantics-Guided Part Attention Network., , , and . ECCV (2), volume 12347 of Lecture Notes in Computer Science, page 330-346. Springer, (2020)Bandwidth Adaptive Hardware Architecture of K-Means Clustering for Video Analysis., and . IEEE Trans. Very Large Scale Integr. Syst., 18 (6): 957-966 (2010)A hardware accelerator for video segmentation using programmable morphology PE array., , and . ISCAS (4), page 341-344. IEEE, (2002)Enhanced temporal error concealment algorithm with edge-sensitive processing order., , , and . ISCAS, page 3466-3469. IEEE, (2008)Partial-result-reuse architecture and its design technique for morphological operations with flat structuring elements., , and . IEEE Trans. Circuits Syst. Video Techn., 15 (9): 1156-1169 (2005)