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Annotating the Java Bytecodes in Support of Optimization., , , and . Concurr. Pract. Exp., 9 (11): 1003-1016 (1997)Elimination of redundant memory traffic in high-level synthesis., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 15 (11): 1354-1364 (1996)Minimization of Memory Traffic in High-Level Synthesis., , and . DAC, page 149-154. ACM Press, (1994)Optimal register assignment to loops for embedded code generation., , , and . ACM Trans. Design Autom. Electr. Syst., 1 (2): 251-279 (1996)A Method for Register Allocation to Loops in Multiple Register File Architectures., , , and . IPPS, page 28-33. IEEE Computer Society, (1996)Survey of Switching Techniques in High-Speed Networks and Their Performance., , , , and . INFOCOM, page 1242-1251. IEEE Computer Society, (1990)Optimal register assignment to loops for embedded code generation., , , and . ISSS, page 42-47. ACM, (1995)Ultra Fine-Grain Template-Driven Synthesis., , and . VLSI Design, page 25-28. IEEE Computer Society, (1994)Integrating program transformations in the memory-based synthesis of image and video algorithms., , and . ICCAD, page 27-30. IEEE Computer Society / ACM, (1994)Copy Elimination for Parallelizing Compilers., , and . LCPC, volume 1656 of Lecture Notes in Computer Science, page 275-289. Springer, (1998)