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Disambiguation of "Kuo, Chin-Cheng"

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Efficient trimmed-sample Monte Carlo methodology and yield-aware design flow for analog circuits.

, , , , and . DAC, page 1113-1118. ACM, (2012)

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Chin-Hsing Kuo

Ming-Cheng Kuo

Shih-cheng Kuo

Chen-Cheng Kuo

Cheng-Yung Cheng

 

Other publications of authors with the same name

A Low Jitter Self-Calibration PLL for 10-Gbps SoC Transmission Links Application., , , , and . IEICE Trans. Electron., 92-C (7): 964-972 (2009)Fast Statistical Analysis of Process Variation Effects Using Accurate PLL Behavioral Models., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 56-I (6): 1160-1172 (2009)A wearable-glasses-based drowsiness-fatigue-detection system for improving road safety., , , , , , and . GCCE, page 1-2. IEEE, (2016)Efficient trimmed-sample Monte Carlo methodology and yield-aware design flow for analog circuits., , , , and . DAC, page 1113-1118. ACM, (2012)An Efficient Approach to Build Accurate Behavioral Models of PLL Designs., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 89-A (2): 391-398 (2006)A fast heuristic approach for parametric yield enhancement of analog designs., , , and . ACM Trans. Design Autom. Electr. Syst., 17 (3): 35:1-35:20 (2012)An Intelligent Scalp Inspection and Diagnosis System for Caring Hairy Scalp Health., , , , , , , and . GCCE, page 507-508. IEEE, (2018)On Efficient Behavioral Modeling to Accurately Predict Supply Noise Effects of PLL Designs in Real Systems., and . VLSI-SoC, page 116-121. IEEE, (2006)A SCORE macromodel for PLL designs to analyze supply noise interaction issues at behavioral level., , and . ASP-DAC, page 516-521. IEEE, (2009)A Heuristic Region-based Concurrency Bug Testing Approach., , and . ISPA/BDCloud/SocialCom/SustainCom, page 1126-1135. IEEE, (2020)