Author of the publication

An 8.5 mW Continuous-Time ΔΣ Modulator With 25 MHz Bandwidth Using Digital Background DAC Linearization to Achieve 63.5 dB SNDR and 81 dB SFDR.

, , , and . IEEE J. Solid State Circuits, 46 (12): 2869-2881 (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A multichannel neurostimulator with transcutaneous closed-loop power control and self-adaptive supply., , , , and . ESSCIRC, page 309-312. IEEE, (2012)An implant for wireless in situ measurement of lip pressure with 12 sensors., , , , , and . BioCAS, page 1-4. IEEE, (2017)A 72dB-DR ΔΣ CT modulator using digitally estimated auxiliary DAC linearization achieving 88fJ/conv in a 25MHz BW., , , , and . ISSCC, page 154-156. IEEE, (2012)A Field Programmable Analog Array using Floating Gates for High Resolution Tuning., , , , , and . ISCAS, page 265-268. IEEE, (2009)A Continuous-Time Field Programmable Analog Array Using Parasitic Capacitance Gm-C Filters., , , , and . ISCAS, page 2236-2239. IEEE, (2007)Visualization of Time-Dependent Velocity Fields by Texture Transport., and . Visualization in Scientific Computing, page 91-101. Springer, (1998)A 10 MHz Bandwidth, 70 dB SNDR Continuous Time Delta-Sigma Modulator With Digitally Improved Reconfigurable Blocker Rejection., , , and . IEEE J. Solid State Circuits, 51 (3): 660-670 (2016)In-depth Analysis and Enhancements of RO-PUFs with a Partial Reconfiguration Framework on Xilinx Zynq-7000 SoC FPGAs., , , and . HOST, page 238-247. IEEE, (2019)A High-Voltage Compliance, 32-Channel Digitally Interfaced Neuromodulation System on Chip., , , , , and . IEEE J. Solid State Circuits, 56 (8): 2476-2487 (2021)A 72 dB DR, CT ΔΣ Modulator Using Digitally Estimated, Auxiliary DAC Linearization Achieving 88 fJ/conv-step in a 25 MHz BW., , , , , and . IEEE J. Solid State Circuits, 49 (2): 392-404 (2014)