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Lazy Irrevocability for Best-Effort Transactional Memory Systems.

, , , and . IEEE Trans. Parallel Distributed Syst., 28 (7): 1919-1932 (2017)

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Enhancing the Parallelization of Sparse Matrices through Dynamic Issues., , and . PDPTA, page 1451-1457. CSREA Press, (1999)Error Analysis and Reduction for Angle Calculation Using the CORDIC Algorithm., , , and . IEEE Trans. Computers, 46 (11): 1264-1271 (1997)LS-Sig: Locality-Sensitive Signatures for Transactional Memory., , , and . IEEE Trans. Computers, 62 (2): 322-335 (2013)CORDIC Processor for Variable-Precision Interval Arithmetic., , and . VLSI Signal Processing, 37 (1): 21-39 (2004)Parallelization Strategies for the VMEC Program., , , and . PARA, volume 1541 of Lecture Notes in Computer Science, page 483-490. Springer, (1998)Parallel algorithm for principal components based on Hotelling's iterative procedure., , and . PDP, page 144-149. IEEE, (1993)A novel design of a two operand normalization circuit., , , and . IEEE Trans. Very Large Scale Integr. Syst., 6 (1): 173-176 (1998)Parallel Squared Error Clustering on Hypercube Arrays., , and . J. Parallel Distributed Comput., 8 (3): 292-299 (1990)Parallelization Techniques for Sparse Matrix Applications., , , and . J. Parallel Distributed Comput., 38 (2): 256-266 (1996)Teaching the Cache Memory System Using a Reconfigurable Approach., , , , and . IEEE Trans. Educ., 51 (3): 336-341 (2008)