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Exploiting path delay test generation to develop better TDF tests for small delay defects., , , and . ITC, page 1-10. IEEE, (2017)Aging-Resilient SRAM-based True Random Number Generator for Lightweight Devices., , and . J. Electron. Test., 36 (3): 301-311 (2020)An IDDQ sensor for concurrent timing error detection., , and . IEEE J. Solid State Circuits, 33 (10): 1545-1550 (1998)A Modular Fault-Tolerant Binary Tree Architecture with Short Links., and . IEEE Trans. Computers, 40 (7): 882-890 (1991)Special session: Hot topics: Statistical test methods., , , , , and . VTS, page 1-2. IEEE Computer Society, (2015)Test application time minimization for RAS using basis optimization of column decoder., , , , and . ISCAS, page 2614-2617. IEEE, (2010)Estimating Operational Age of an Integrated Circuit., , , and . J. Electron. Test., 37 (1): 25-40 (2021)Timing Variation Adaptive Pipeline Design: Using Probabilistic Activity Completion Sensing with Backup Error Resilience., , , , and . VLSID, page 122-127. IEEE Computer Society, (2014)An Efficient Transition Detector Exploiting Charge Sharing., and . VLSID, page 298-303. IEEE Computer Society, (2015)Silent Data Errors: Sources, Detection, and Modeling., , , and . VTS, page 1-12. IEEE, (2023)