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Performance Evaluation of a Dynamically Switchable SIMD/MIMD Processor by Using an Image Recognition Application.

, , и . Inf. Media Technol., 5 (2): 366-375 (2010)

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Shin'ichiro Nakamura

 

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IMAP-CE: a 51.2 GOPS video rate image processor with 128 VLIW processing elements., , и . ICIP (3), стр. 294-297. IEEE, (2001)Knowledge-Based Approach for Adaptive Recognition of Drawings., и . Pattern Recognition, том 301 из Lecture Notes in Computer Science, стр. 333-342. Springer, (1988)A low-cost mixed-mode parallel processor architecture for embedded systems., , , , и . ICS, стр. 253-262. ACM, (2007)An Integrated Memory Array Processor Architecture for Embedded Image Recognition Systems., , и . ISCA, стр. 134-145. IEEE Computer Society, (2005)Performance Evaluation of a Dynamically Switchable SIMD/MIMD Processor by Using an Image Recognition Application., , и . Inf. Media Technol., 5 (2): 366-375 (2010)A dynamic SIMD/MIMD mode switching processor for embedded real-time image recognition systems., , и . A-SSCC, стр. 17-20. IEEE, (2011)A Real-Time Vision System Using Integrated Memory Array Processor Prototype LSI., , и . MVA, стр. 47-50. (1992)Efficient data transfer operations for a SIMD processor array system., , , , , , и . ICASSP, стр. 1625-1628. IEEE, (2012)Mapping schemes of image recognition tasks onto highly parallel SIMD/MIMD processors., , и . ICDSC, стр. 1-6. IEEE, (2009)IMAPCAR: A 100 GOPS In-Vehicle Vision Processor Based on 128 Ring Connected Four-Way VLIW Processing Elements., и . J. Signal Process. Syst., 62 (1): 5-16 (2011)