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Disambiguation of "Diniz, Pedro C."

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Performance and Area Modeling of Complete FPGA Designs in the Presence of Loop Transformations.

, , and . IEEE Trans. Computers, 53 (11): 1420-1435 (2004)

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Pedro C Hidalgo Calcines

Pedro C Hidalgo Calcines

Rogério Palhares Diniz

Benno Pedrotti

Roberto Antonio Costa Diniz

 

Other publications of authors with the same name

Synchronization transformations for parallel computing., and . Concurr. Pract. Exp., 11 (13): 773-802 (1999)Lock Coarsening: Eliminating Lock Overhead in Automatically Parallelized Object-Based Programs., and . J. Parallel Distributed Comput., 49 (2): 218-244 (1998)Domain-Specific Optimization of Signal Recognition Targeting FPGAs., , , , and . ACM Trans. Reconfigurable Technol. Syst., 4 (2): 17:1-17:26 (2011)An evaluation of lazy fault detection based on Adaptive Redundant Multithreading., , , and . HPEC, page 1-6. IEEE, (2014)Matching and searching analysis for parallel hardware implementation on FPGAs., , and . FPGA, page 125-133. ACM, (2001)Commutativity Analysis: A New Analysis Technique for Parallelizing Compilers., and . ACM Trans. Program. Lang. Syst., 19 (6): 942-991 (1997)Memory Parallelism Using Custom Array Mapping to Heterogeneous Storage Structures., and . FPL, page 1-6. IEEE, (2006)Design of a Field-Programmable Dual-Precision Floating-Point Arithmetic Unit., and . FPL, page 1-4. IEEE, (2006)Resiliency-aware scheduling: Resource allocation for hardened computation on configurable devices., and . FPT, page 129-134. IEEE, (2012)Evaluating High-Level Program Invariants Using Reconfigurable Hardware., and . ARC, volume 8405 of Lecture Notes in Computer Science, page 121-132. Springer, (2014)