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Disambiguation of "Davidson, Edward S."

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Comments on Än Algorithm for Synthesis of Multiple-Output Combinational Logic".

, and . IEEE Trans. Computers, 17 (11): 1091-1092 (1968)

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Other publications of authors with the same name

Maximum rate single-phase clocking of a closed pipeline including wave pipelining, stoppability, and startability., , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 14 (12): 1526-1545 (1995)A Prefetch Taxonomy., , and . IEEE Trans. Computers, 53 (2): 126-140 (2004)Active Management of Data Caches by Exploiting Reuse Information., , , , and . IEEE Trans. Computers, 48 (11): 1244-1259 (1999)Organization of Semiconductor Memories for Parallel-Pipelined Processors., and . IEEE Trans. Computers, 26 (2): 162-169 (1977)An Algorithm for NAND Decomposition Under Network Constraints.. IEEE Trans. Computers, 18 (12): 1098-1109 (1969)Call graph prefetching for database applications., , and . ACM Trans. Comput. Syst., 21 (4): 412-444 (2003)A multiminiprocessor system implemented through pipelining., and . Computer, 7 (2): 42-51 (1974)Author retrospective for optimum modulo schedules for minimum register requirements., , and . ICS 25th Anniversary, page 35-36. ACM, (2014)An evaluation of Cray X-MP performance on vectorizable Livermore FORTRAN kernels., and . ICS, page 510-518. ACM, (1988)A custom-designed integrated circuit for the realization of residue number digital filters., , and . ICASSP, page 220-223. IEEE, (1985)