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Towards an explanatory and computational theory of scientific discovery, , , , , and . CoRR, (2009)An Analytical Cache Model., , and . ACM Trans. Comput. Syst., 7 (2): 184-215 (1989)Tiny Tera: a packet switch core., , , , and . IEEE Micro, 17 (1): 26-33 (1997)Rigel: flexible multi-rate image processing hardware., , , , , and . ACM Trans. Graph., 35 (4): 85:1-85:11 (2016)Digital Analog Design: Enabling Mixed-Signal System Validation., , , , and . IEEE Des. Test, 32 (1): 44-52 (2015)A Framework for Adding Low-Overhead, Fine-Grained Power Domains to CGRAs., , , , , , , , , and . DATE, page 846-851. IEEE, (2020)CMOS Image Sensors With Multi-Bucket Pixels for Computational Photography., , , , and . IEEE J. Solid State Circuits, 47 (4): 1031-1042 (2012)Energy-Performance Tunable Logic., , and . IEEE J. Solid State Circuits, 44 (9): 2554-2567 (2009)TANGRAM: Optimized Coarse-Grained Dataflow for Scalable NN Accelerators., , , , and . ASPLOS, page 807-820. ACM, (2019)Error Control and Limit Cycle Elimination in Event-Driven Piecewise Linear Analog Functional Models., and . IEEE Trans. Circuits Syst. I Regul. Pap., 63-I (1): 23-33 (2016)