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Disambiguation of "Ochi, Hiroyuki"

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Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-Based Design and Its Irradiation Testing.

, , , , , , , , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 97-A (12): 2518-2529 (2014)

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Hiroyuki Tan

Hiroyuki Kobayashi

Samuel Ochieng'-Akatch

Justus Ochieng

Hisashi Ochi

 

Other publications of authors with the same name

Network Processor for High-Speed Network and Quick Programming., , , , and . Journal of Circuits, Systems, and Computers, 16 (1): 65-79 (2007)Experimental validation of minimum operating-voltage-estimation for low supply voltage circuits., , , and . ISQED, page 428-433. IEEE, (2014)Autonomous Repair Fault Tolerant Dynamic Reconfigurable Device., , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 91-A (12): 3612-3621 (2008)An Asynchronous IEEE-754-standard Single-precision Floating-point Divider for FPGA., , and . IPSJ Trans. Syst. LSI Des. Methodol., (2009)Selectable grained reconfigurable architecture (SGRA) and its design automation., , , and . SoCC, page 196-201. IEEE, (2017)Fast and memory-efficient GPU implementations of krylov subspace methods for efficient power grid analysis., , , and . ACM Great Lakes Symposium on VLSI, page 95-100. ACM, (2013)Hot-swapping architecture with back-biased testing for mitigation of permanent faults in functional unit array., , , , , and . DATE, page 535-540. EDA Consortium San Jose, CA, USA / ACM DL, (2013)A Localization Scheme for Sensor Networks based onWireless Communication with Anchor Groups., , and . ICPADS (1), page 299-305. IEEE Computer Society, (2005)Efficient memory architecture for JPEG2000 entropy codec., , , , , and . ISCAS, IEEE, (2006)Reliability Evaluation Environment for Exploring Design Space of Coarse-Grained Reconfigurable Architectures., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 93-A (12): 2524-2532 (2010)