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Voltage island management in near threshold manycore architectures to mitigate dark silicon., , , and . DATE, page 1-6. European Design and Automation Association, (2014)An efficient design space exploration methodology for multiprocessor SoC architectures based on response surface methods., , and . ICSAMOS, page 150-157. IEEE, (2008)Floorplan-aware hierarchical NoC topology with GALS interfaces., , , , , , and . ISCAS, page 652-655. IEEE, (2012)DeSpErate++: An Enhanced Design Space Exploration Framework Using Predictive Simulation Scheduling., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (2): 293-306 (2015)Understanding the I/O Impact on the Performance of High-Throughput Molecular Docking., , , and . PDSW@SC, page 9-14. IEEE, (2021)Using multi-objective design space exploration to enable run-time resource management for reconfigurable architectures., , , , , and . DATE, page 1379-1384. IEEE, (2012)A Bayesian network approach for compiler auto-tuning for embedded processors., , , and . ESTIMedia, page 90-97. IEEE, (2014)An Internal Partial Dynamic Reconfiguration Implementation of the JPEG Encoder for Low-Cost FPGAsb., , , , and . ISVLSI, page 449-450. IEEE Computer Society, (2007)Meta-model Assisted Optimization for Design Space Exploration of Multi-Processor Systems-on-Chip., , , and . DSD, page 383-389. IEEE Computer Society, (2009)Application-Specific Topology Design Customization for STNoC., , , , and . DSD, page 547-550. IEEE Computer Society, (2007)